Table 7-1 Essi Clock Sources - Motorola DSP56309 User Manual

24-bit digital signal processor
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Enhanced Synchronous Serial Interface (ESSI)
ESSI Programming Model
SYN
SCKD
0
0
0
0
0
1
0
1
1
0
1
1
7.3.6
Serial Control Signal (SC2)
SC02 is a serial control signal for ESSI0, and SC12 is a serial control signal for ESSI1. They
are referred to collectively as SC2.
This signal is used for frame sync I/O. SC2 is the frame sync for both the transmitter and
receiver in synchronous mode and for the transmitter only in asynchronous mode. The
direction of this signal is determined by the SCD2 bit in the CRB. When configured as an
output, this signal outputs the internally generated frame sync signal. When configured
as an input, this signal receives an external frame sync signal for the transmitter in
asynchronous mode and for the receiver when in synchronous mode. SC2 can be
programmed as a GPIO signal (P2) when the ESSI SC2 function is not being used.
7.4
ESSI PROGRAMMING MODEL
The ESSI includes the following registers:
¥ Two control registers (CRA, CRB) illustrated in Figure 7-2 and Figure 7-3
¥ One status register (SSISR) illustrated in Figure 7-4
7-8

Table 7-1 ESSI Clock Sources

R Clock
SCD0
Source
Asynchronous
0
EXT, SC0
1
INT
0
EXT, SC0
1
INT
Synchronous
0/1
EXT, SCK
0/1
INT
DSP56309UM/D
RX
T Clock
Clock
Source
Out
Ñ
EXT, SCK
SC0
EXT, SCK
Ñ
INT
SC0
INT
Ñ
EXT, SCK
SCK
INT
TX Clock Out
Ñ
Ñ
SCK
SCK
Ñ
SCK
MOTOROLA

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