Details Of I/O Signals - Mitsubishi Electric MELSEC iQ-R Series User Manual

Details of I/O signals

This section describes the ON/OFF timing and condition for each I/O signal.
Module READY (X0)
This signal turns on when the CPU module is powered off and on or reset or when the RJ71CN91 is ready.
It turns off when a watchdog timer error occurs.
• On: Module ready
• Off: The module is in preparation or a watchdog timer error exists.
Data exchange completed (X1), Data exchange request (Y1)
These signals are used for data exchange between the buffer memory, object dictionary, and communication buffer of the
RJ71CN91.
When 'Data exchange request' (Y1) is turned on, data exchange starts as follows.
• The latest receive data that has been received by the RJ71CN91 is stored in the buffer memory.
• The send data written in the buffer memory is loaded into the RJ71CN91.
When data exchange is completed, 'Data exchange completed' (X1) is turned on.
After 'Data exchange completed' (X1) is turned on, turn off 'Data exchange request' (Y1). Then 'Data exchange completed'
(X1) will be turned off.
The following table lists the data exchange target buffer memory areas.
: Data exchange target, : Not data exchange target
Buffer memory
EMCY message buffer
RPDO
TPDO
Receive/Transmit process
data
*1 Data exchange is not performed when the own node is not Operational.
When 'Data exchange control' (Un\G20) is used, the data exchange target buffer memory areas can be changed for each data exchange
operation.
• Do not read or write buffer memory send/receive data during data exchange operation.
• Request the next data exchange operation after 'Data exchange completed' (X1) is turned off.
• By following the above two procedures, it becomes possible to prevent the data inconsistency of buffer
memory send/receive data and the overwriting of receive data in an unexpected timing.
• For details on the timings in which data after data exchange is actually sent or received on the network,
refer to the following.
Page 40 PDO, Page 51 EMCY,Page 61 Layer 2 Message Transmission and Receive
APPX
148
Appendix 1 I/O Signals
Data exchange direction
RJ71CN91  Buffer memory
RJ71CN91  Buffer memory
Buffer memory  RJ71CN91
Depending on settings for each slot.
Send data: Buffer memory  RJ71CN91
Receive data: RJ71CN91  Buffer
memory
Function mode
CANopen 405 mode 11-bit CAN-ID Layer 2 message mode
29-bit CAN-ID Layer 2 message mode
 
*1
 
*1
 
 