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Interrupt System
8-49. Sequence For ICS-Type Interrupts
Figure 8-5 illustrates the sequence of operations for
processing
ICS-type
internal interrupts.
The figure shows how
control is
transferred from the point of interrupt in the user's code to the
start of the
in·terrupt code segment and how the
data domain
is
switched from the
user's stack
to the Interrupt
Control Stack.
The initial
assumption is that the current process is
executing
at the point
P
in the user's code
when an interrupt
condition
occurs.
The CPU then
passes control to the
Interrupt Handler.
The sequence of operations is as follows:
a.
The first
action of the
Interrupt Handler
is to
push into
memory any
TOS elements of the current user's data
that are
in CPU registers (l, figure 8-5).
This takes
a maximum
of
four memory
cycles if all four registers are full.
Next, a
normal four-word stack marker is pushed onto the user's stack
followed by the value of the user's DB-Bank and the
absolute
value of DB that is currently in use.
(DB may not necessarily
point to
a location within
the user's stack,
such as
if a
system intrinsic
using a split stack had been
called 'at the
time of the interrupt.)
This action
preserves most
of the
user's environment;
the current value of S will be preserved
late r in step f.
b.
The S-Bank Register
(2) is set to
O.
(The ICS is
always in
Bank 0.)
c.
The Interrupt Handler now goes to location 5 and loads the QI
value (3)
into the Q Register.
This points
at
the
Delta-Q
location
of
the permanent Dispatcher marker.
(As explained
previously, this location contains a value of 0.)
d.
The contents of location 6 is fetched and the value of ZI (4)
is loaded into
the Z Register.
This establishes
the stack
limit for the ICS. (The ICS Flag in the CPXl Register is also
set .)
e.
The DL Register
(5) is set to the limit value of %177777.
f.
The user's value of S relative to stack DB
(at QI-4) is cal-
culated and stored in QI-6 (6).
(Up to this point the opera-
tion has
been identical
to the sequence
of operations
for
external interrupts, described earlier.)
g.
An external program label (7) is created which points to seg-
ment 1,
and whose
STT number is a function
of the
type of
interrupt. (Refer to table 8-1.)
h.
S is now set to Q+3 and a parameter is pushed onto the ICS at
that location
(8).
Most ICS-type internal
interrupts pass
the external
program label however.
For example,
a Module
Interr upt passes the module n umbe r.
8-19
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