HP 3000 III Series Manual page 236

MCU/Main' Memory Overview
signal input. NFRUNCLK is in sync with NMCUCLK, but cannot be
halted with the single-cycle switch. Power failures are sensed
in the power supplies (Sections IX and X) to initiate the NPF
WARN (power fail warning) to the CPU and memory. The MCL PCA
guarantees 3.0 msec for the CPU to execute its power fail routine
and store the necessary information into memory. After this 3.0-
msec interval, clock timing to memory is disabled to prevent any
further read or write operations until power is restored.
6-28. Memory peA Descriptions
Brief descriptions of the memory PCA's are contained in para-
graphs 6-29 through 6-31. The various memory PCA configurations
are discussed in paragraph 2-11.
6-29. SMA PCA. The SMA PCA contains the data and check bit stor-
age array for the 128K-word dynamic semiconductor memory. The
address/data receivers and drivers that interface with the MCL
PCA are also conta ined on this PCA. All commun ica t ion with the
SMA PCA is governed by the MCL PCA. SMA PCA operations are dis-
cussed in paragraphs 6-32 through 6-36.
The individual semiconductor memory chip is a 16K by 1 storage
device (16 thousand one bit words) • On the SMA PCA, the chips
are physically arranged in eight rows with 22 chips on a line as
shown in figure 6-5. Since a maximum of eight SMA PCA's can be
contained in memory, each SMA PCA contains Switch Sl that iden-
tifies the portion of memory represented by that SMA PCA. Refer
to paragraph 6-48 for the proper setting of Sl.
6-30. MCL PCA. The MCL PCA contains the read/write control cir-
cuits, MCU logic, refresh circuits, address and data registers,
MCU logic, refresh circuits, error logging array, and error cor-
rection logic for the memory module. This PCA also contains the
ch eck b it par i ty gene ra tor sand che cke rs. Since the MCL PCA can
support up to four SMA PCA's, it must be configured to its asso-
ciated ~emory module size. Refer to paragraph 6-49 for the var-
ious switch settings. MCL PCA operations are discussed in para-
graphs 6-32 through 6-36.
6-31. FLI PCA. The FLI PCA (part no. 30009-60002 for HP 32421A
Series III and part no. 30135-60063 for HP 32435A Series III)
contains the control circuits and I/O logging array for interro-
gating the MeL PCA's error logging array. Refer to paragraph
6-50 for FLI PCA switch settings. FLI PCA operations are discus-
sed in paragraphs 6-32 through 6-36.
6-32. Memory Operations
Memory has the following operating modes and specifications:
a. WRITE; 700 nsec cycle time (minimum)
6-12