HP 3000 III Series Manual page 114

System Verification and Troubleshooting
Table 3-2. Maintenance Panel Switches and Lamps (Continued)

----l---------~----·---------------·-~----~-----I
IPanell Panel Marking
1
Use
I
1
Row
1 1 1
1 1 1 1
----- 1-------------1-·---------
·---·------~-----------I
11
1
SINGLE CYCLE
1
with this switch at the NORMAL position,
1
1
REGISTER
1
RA, RB, RC, and RD on the S-Bus PCA can
1
1
DISPLAY, ALT/
1
be displayed by the REGISTER DISPLAY
1
NORMAL lamps. With the switch at ALT, RA, RB,
I
(bistable RC, and RD on the R-Bus PCA can be dis-
I
switch) played. Also, with the switch at NOR-
1
MAL, SPI and Pre-adder are displayed
from the S-Bus; with the switch at ALT,
SPI and the Pre-adder are displayed from
the R-Bus.
This switch must be at NORMAL to store
into RA, RB, RC, RO, or SPI from the
Maintenance Panel.
11 TIMERS (bi-
stable switch)
Enables or disables the CPU, memory,
lOP, and Selector Channel timers.
11 ERROR FREEZE
(bistable
sw itch)
In the ENABLE position, this switch
causes a freeze when any of the follow-
ing occurs:
Illegal memory address
Memory address parity error
MCUO par ity error
System par ity error
I/O data parity error
I/O address parity error
To end the freeze, the ERROR FREEZE
switch is set to the down position.
11 IN'rRPT (bi-
stable switch)
When the computer is running, setting
this switch to INHIBIT causes all inter-
nal and external interrupts to be ignor-
ed, with the exception of the power fail
interrupt. When the switch fs returned
to the ENABLE position, the previously
ignored interrupts are processed. The
switch performs no function when the
computer is halted.
Enables or disables the lOP SINGLE STEP
EXECUTE sw itch.
11
lOP SINGLE
STEP ENABLE/
I
INHIBIT
I
(bistable
1
sw itch)
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