HP 3000 III Series Manual page 199

System Micr ocode
Table 5-4. Function Field Code Definitions (Continued)
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interface supplies these field
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codes which put the content of the
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selected register in the associated
r-egiste r (R- or S-Bus). The T-Bu s
and U-Bus become the R-Bus Register
content plus the S-Bus Register
content (one of which will be zer-
os). The auxiliary control panel
completes this operation by dis-
playing the U-Busas the selected
register.
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Field
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Cbde
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Description
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PNLR (Cont)
Label and Name
PNLS
(Panel Store)
10001 The PNLS Function field code allows
the auxiliary control panel to load
a CPU register with the content of
one of its switch registers. This
code is part of the halt mode in-
terrupt micro-routine for servicing
a maintenance panel interrupt. When
PNLS is executed, the ROM Output
Register (ROR2) Store field is dis-
abled and the maintenance panel in-
ter face card supplies the Store
field code respective of the sel-
ected CPU register. A SWCH S-Bus
field code causes the S-Bus Regist-
er to be loaded wi th the content of
the selected auxiliary control pan-
e 1 s wit ch regis te r • The T-B usa nd
U-Bus become the R-Bus Register
content (zeros) plus the S-Bus Reg-
ister content and, at the end of the
cycle, the selected register is
loaded with the U-Bus data.
QASL 00000
The QASL Function field code causes
a four register arithmetic shift
Ie ft of the U-Bus, SP 3 and SP 1
Registers, and the R-Bus Register
containing the most, next most,
next least, and least significant
words respectively. Shift reft One
code (SLl) is required in the Shift
field. The sign bit is preserved.
- - - - - - ~ - - - - - - _ . -~_._,-~ ---------------~----~--~._-_
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..
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•..
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...
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5-19