HP 3000 III Series Manual page 278

I/O Systelll
/I'h~:: RIO instruction begins by performing a TIO to the Device Con-
troller as previously discussed to check the Read/Write OK status
bit (bit 1)
e
If status is acceptable, the same sequence is re-
peated except that the command is RIO and data is transferred
from the Data In Buffer rather than the Status Register.
The CIO instruction obtains a control word from the TOS register
(RA) and sends it to the Device Controller's Control Register.
When the CPU encounters a CIO instruction, its CIO microprogram
ioa6s the
RA
contents into the IOD Data Out Register and then
is~es
a command word to the lOP. The command word causes a CIO
IOCMD to be issued to the Device Controller addressed by the
DEVNO code along with
so.
Simultaneously, the contents of the
IOD Data Register are read out onto the IOD lines. When the
De-
vice Controller decodes the IOCMD, it loads the word on the IOD
lines into its Control Register and returns SI to the lOP. When
the lOP receives SI, the lOP returns a signal to the CPU, indi-
cating completion of the instruction.
The WIO instruction begins by performing a TIO to the controller
to check the Read/Write OK status bit. If status is acceptable,
the remaining operations for the Write I/O instruction are the
same as for CIO except that the information sent is a data word,
the IOCMD is WIO instead of CIO, and the information is loaded
into the Device Controller's Data Out Buffer instead of its Con-
trol Register.
7-28. PROGRAMMED I/O. When a driver issues an SIO instruction to
a requested Device Controller, the I/O hardware begins to execute
the I/O program independently of the CPU. The CPU is then free
to continue processing in parallel with the I/O operations. Par-
agraphs 7-29 and 7-30 define the elements of an I/O program and
describe the hardware actions occurring after the SIO instruction
is issued.
7-29. I/O Program Word. The format of an I/O program word is
illustra ted in figure 4-14. Two computer word s are used to ac-
commodate the 32-bit word length. The first word is designated
as the I/O Command Word, or IOCW, and the second word is desig-
nated as the I/O Address Word, or IOAW. Data chaining occurs for
WRITE and READ orders if bit 0 of the IOCW is a "1". This bit
may be a "1" for a WRITE order followed by a WRITE or for a READ
order followed by a READ. This will permit the hardware to treat
the counts of each order as a continuous chained count, without
reinitializing for each order. The
DC
bit should be "0" for all
other orders. The count field of the IOCW contains the least
significant 12 bits of a two's complement negative count value
for WRITE and READ orders. The count is a word count, indepen-
dent of the particular recording format (bytes, words, or re-
cords). For a CONTROL order, these 12 bits are used for control
information in addition to the 16 control bits in the IOAW (a
total of 28 bits). Complete definitions of the I/O orders are
contained in paragraph 4-16, Instruction Cbmmentary number 8.
7-24