HP 3000 III Series Manual page 110

System Veri fica tion and Tr oubleshoot ing
Table 3-2. Maintenance Panel Switches and Lamps (Continued)

----r--.-.------~__r~-----·-----·-·--·---·-··-~---I
I
Panel
I
Panel Marking
I
Use
I
I
Row
I I I
I I I I
5
5
5
5
NOP (lamp)
(Cont)
BNDV (lamp)
LUT GATE
(lamp)
I N'r RPT GATE
(lamp)
INTG on (A CPU interrupt is forcing
the V-Bus to address 3).
The execution of a V-Bus jump with
pane 1 sw itches.
Indicates a memory instruction refer-
ences an address outside the limit reg-
iste r s.
Indicates an instruction target address
is being sent to the V-Bus.
Indicates when doing a NEXT + 1 cycle
and a microcode interrupt is pending or
when a bounds violation has been de-
tected.
5 U GATE (lamp)
5
RAR GATE
( lamp)
5
SAVE GATE
( lamp)
5
JUMP 1 GATE
( lamp)
5
JUMP 2 GATE
( lamp)
5 JUMP FREEZE
(lamp)
6
DIRECT ACTIVE
(lamp)
6
SERVICE OUT
( lamp)
Indicates the U-Bus is gated onto the V-
Bus.
Indicates the current address + 1 is put
on the V-Bus.
Indicates the microcode return address
is being gated onto the V-Bus.
Indica tes the jump targe t from Rank 1 is
being gated onto the V-Bus.
Indicates the jump target from Rank 2 is
being gated onto the V-Bus.
Indicates a one cycle freeze is taking
place to allow a new V-Bus address.
Indicates the lOP is sending out a di-
rect I/O command.
Ind ica tes to de vi ce con troller:
For direct commands; the command
code, device address, and data on
on the bus are valid.
For SIO transfers inbound; data on
the bus is anticipated.
For SIO transfers outbound; data on
bus is valid.
3-10