4
4.4 EIT Processing Mechanism
The M32R/E's EIT processing mechanism consists of the M32R CPU core and the interrupt
controller for internal peripheral I/Os. It also has the backup registers for the PC and PSW (BPC
register and the BPSW field of the PSW register). The M32R/E's internal EIT processing
mechanism is shown below.
RESET
SBI
Internal
peripheral
Figure 4.4.1 The M32R/E's EIT Processing Mechanism
Interrupt
controller
•
•
(ICU)
•
•
•
I/O
•
M32R/E
M32R CPU core
RI
AE, RIE, TRAP
SBI
EI
IE flag
(PSW)
BPSW
PSW
PSW register
4-6
4.4 EIT Processing Mechanism
High
RI
Priority
SBI
EI
Low
BPC register
PC register
EIT
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