Mitsubishi Electric M32R Series User Manual page 68

Mitsubishi 32-bit risc single-chip microcomputers
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3
Address
D0
H'0080 0000
H'0080 0002
H'0080 0004
H'0080 0006
~ ~
H'0080 0060
CAN0 Transmit/Receive & Error Interrupt Control Register (ICAN0CR)
H'0080 0062
H'0080 0064
SIO4,5 Transmit/Receive Interrupt Control Register (ISIO45CR)
H'0080 0066
H'0080 0068
SIO2,3 Transmit/Receive Interrupt Control Register (ISO23CR)
H'0080 006A
H'0080 006C
A-D0 Conversion Interrupt Control Register (IAD0CCR)
H'0080 006E
H'0080 0070
H'0080 0072
H'0080 0074
MJT Output Interrupt Control Register 2 (IMJTOCR2)
H'0080 0076
H'0080 0078
H'0080 007A
H'0080 007C
H'0080 007E
H'0080 0080
H'0080 0082
H'0080 0084
H'0080 0086
H'0080 0088
H'0080 008A
H'0080 008C
~ ~
H'0080 0090
H'0080 0092
H'0080 0094
H'0080 0096
H'0080 0098
H'0080 009A
H'0080 009C
H'0080 009E
H'0080 00A0
H'0080 00A2
H'0080 00A4
H'0080 00A6
H'0080 00A8
H'0080 00AA
H'0080 00AC
H'0080 00AE
~ ~
H'0080 00D0
Blank addresses are reserved areas
Figure 3.4.4 Register Mapping of the SFR Area (1)
+0 Address
Interrupt Mask Register (IMASK)
SBI Control Register (SBICR)
TID2 Output Interrupt Control Register (ITID2CR)
TID1 Output Interrupt Control Register (ITID1CR)
TOD0 Output Interrupt Control Register (ITOD0CR)
SIO0 Receive Interrupt Control Register (ISIO0RXCR)
SIO1 Receive Interrupt Control Register (ISIO1RXCR)
MJT Output Interrupt Control Register 0 (IMJTOCR0)
MJT Output Interrupt Control Register 4 (IMJTOCR4)
MJT Output Interrupt Control Register 6 (IMJTOCR6)
MJT Input Interrupt Control Register 0 (IMJTICR0)
MJT Input Interrupt Control Register 2 (IMJTICR2)
MJT Input Interrupt Control Register 4 (IMJTICR4)
A-D0 Single Mode Register 0 (AD0SIM0)
A-D0 Scan Mode Register 0 (AD0SCM0)
A-D0 Successive Approximation Register (AD0SAR)
D7 D8
Interrupt Vector Register (IVECT)
TML1 Input Interrupt Control Register (ITML1CR)
A-D1 Conversion Interrupt Control Register (IAD1CCR)
TOD1-TOM0 Output Interrupt Control Register (ITOM0CR)
RTD Interrupt Control Register (IRTDCR)
DMA5-9 Interrupt Control Register (IDMA59CR)
TID0 Output Interrupt Control Register (ITID0CR)
SIO0 Transmit Interrupt Control Register (ISIO0TXCR)
SIO1 Transmit Interrupt Control Register (ISIO1TXCR)
DMA0-4 Interrupt Control Register (IDMA04CR)
MJT Output Interrupt Control Register 1 (IMJTOCR1)
MJT Output Interrupt Control Register 3 (IMJTOCR3)
MJT Output Interrupt Control Register 5 (IMJTOCR5)
MJT Output Interrupt Control Register 7 (IMJTOCR7)
MJT Input Interrupt Control Register 1 (IMJTICR1)
MJT Input Interrupt Control Register 3 (IMJTICR3)
A-D0 Single Mode Register 1 (AD0SIM1)
A-D0 Scan Mode Register 1 (AD0SCM1)
A-D0 Comparate Data Register (AD0CMP)
10-bit A-D0 Data Register 0 (AD0DT0)
10-bit A-D0 Data Register 1 (AD0DT1)
10-bit A-D0 Data Register 2 (AD0DT2)
10-bit A-D0 Data Register 3 (AD0DT3)
10-bit A-D0 Data Register 4 (AD0DT4)
10-bit A-D0 Data Register 5 (AD0DT5)
10-bit A-D0 Data Register 6 (AD0DT6)
10-bit A-D0 Data Register 7 (AD0DT7)
10-bit A-D0 Data Register 8 (AD0DT8)
10-bit A-D0 Data Register 9 (AD0DT9)
10-bit A-D0 Data Register 10 (AD0DT10)
10-bit A-D0 Data Register 11 (AD0DT11)
10-bit A-D0 Data Register 12 (AD0DT12)
10-bit A-D0 Data Register 13 (AD0DT13)
10-bit A-D0 Data Register 14 (AD0DT14)
10-bit A-D0 Data Register 15 (AD0DT15)
8-bit A-D0 Data Register 0 (AD08DT0)
3-12
ADDRESS SPACE
3.4 Internal ROM/SFR Area
+1 Address
D15
Ver.0.10
~ ~
~ ~
~ ~

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