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8
P84 (SCLKI0, SCLKO0)
P87 (SCLKI1, SCLKO1)
P65 (SCLKI14, SCLKO4)
P66 (SCLKI15, SCLKO5)
MOD0
MOD1
FP
_____
RESET
Note :
denotes pins.
Figure 8.4.4 Port Peripheral Circuit Diagram (4)
INPUT/OUTPUT PORTS AND PIN FUNCTIONS
Direction
register
Data bus
Port output
(DB0 - DB15)
Operation
mode register
UART/CSIO
function select bit
Internal/external
clock select bit
SCLKOi output
SCLKIi input
MOD0 , MOD1
FP
RESET
8-34
8.4 Port Peripheral Circuits
latch
Input function
enable
Ver.0.10
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