Mitsubishi Electric M32R Series User Manual page 719

Mitsubishi 32-bit risc single-chip microcomputers

Table of Contents

(2) When Bus Mode Control Register = 1

External read/write operations are performed using the address bus, data bus, and signals CS0,

CS1, RD, BHE, BLE, WAIT, and WR. In external read cycle, the RD signal goes low and BHE or

BLE output for the byte position from which to read is pulled low, reading data from only the byte

position of the bus. In external write cycle, the WR signal goes low and BHE or BLE output for the

byte position to which to write is pulled low, writing data to the necessary byte position.

When an external bus cycle starts, wait cycles are inserted as long as the WAIT signal is low.

Unless the WAIT signal is needed, leave it held high. During external bus cycle, at least one wait

cycle is inserted even for the shortest-case access. (The shortest bus cycle is 2 BCLK periods.)

When not using the WAIT function, the pin can be used as P71 by setting the P7 Operation Mode

Note 1 : Hi-Z denotes a high-impedance state.

Note 2 : BCLK is not output.

Figure 15.2.4 Internal Bus Access during Bus Free State

EXTERNAL BUS INTERFACE

15.2 Read/Write Operations

Bus-free state

internal bus access