Mitsubishi Electric M32R Series User Manual page 640

Mitsubishi 32-bit risc single-chip microcomputers
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13
CAN0 Error Interrupt Mask Register (CAN0ERIMK)
D8
D
Bit Name
8-12
No functions assigned
13
EIM
(CAN bus error interrupt mask)
14
PIM
(Error passive interrupt mask)
15
OIM
(Bus off interrupt mask)
(1) EIM (CAN Bus Error Interrupt Mask) bit (D5)
This bit controls interrupt requests generated for occurrence of CAN bus errors by enabling or
disabling them. CAN bus error interrupt requests are enabled by setting this bit to 1.
(2) PIM (Error Passive Interrupt Mask) bit (D6)
This bit controls interrupt requests generated when the CAN module enters an error passive
state by enabling or disabling them. Error passive interrupt requests are enabled by setting this
bit to 1.
(3) OIM (Bus Off Interrupt Mask) bit (D7)
This bit controls interrupt requests generated when the CAN module enters a bus-off state by
enabling or disabling them. Bus-off interrupt requests are enabled by setting this bit to 1.
9
10
11
13-26
13.2 CAN Module Related Registers
<Address:H'0080 1015>
12
13
14
EIM
PIM
Function
0: Masks (disables) interrupt request
1: Enables interrupt request
CAN MODULE
D15
OIM
<When reset:H00>
R
W
0
Ver.0.10

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