Interrupt Sources Of Internal Peripheral I/Os - Mitsubishi Electric M32R Series User Manual

Mitsubishi 32-bit risc single-chip microcomputers
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5

5.2 Interrupt Sources of Internal Peripheral I/Os

The interrupt controller receives as its inputs the interrupt requests from MJT (multijunction timer),
DMAC, serial I/O, A-D converter, RTD, and CAN. For details about these interrupts, refer to each
section in which the relevant internal peripheral I/O is described.
Table 5.2.1 Interrupt Sources of Internal Peripheral I/Os (1/2)
Interrupt Cause
A-D0 conversion interrupt
A-D1 conversion interrupt
SIO0 transmit interrupt
SIO0 receive interrupt
SIO1transmit interrupt
SIO1 receive interrupt
SIO2,3 transmit/receive
interrupt
SIO4,5 transmit/receive
interrupt
TID0 output interrupt
TID1 output interrupt
TID2 output interrupt
TOD0 output interrupt
TOD1 + TOM0 output
interrupt
TML1 input interrupt
RTD interrupt
DMA transfer interrupt 0
DMA transfer interrupt 1
CAN0 transmit/receive
& error interrupt
Note: ICU type of input source
• Edge-recognized: Interrupt requests are generated on a falling edge of the interrupt signal applied to
• Level-recognized: Interrupt requests are generated when the interrupt signal applied to the ICU is
5.2 Interrupt Sources of Internal Peripheral I/Os
Contents
Single-shot conversion in A-D0 converter scan mode completed,
single mode completed, or comparator mode completed
Single-shot conversion in A-D1 converter scan mode completed,
single mode completed, or comparator mode completed
SIO0 transmit buffer empty interrupt
SIO0 reception completed or receive error interrupt
SIO1 transmit buffer empty interrupt
SIO1 reception completed or receive error interrupt
SIO2, 3 reception completed or receive error interrupt
Transmit buffer empty interrupt
SIO4, 5 reception completed or receive error interrupt
Transmit buffer empty interrupt
TID0 output
TID1 output
TID2 output
TOD0_0 to TOD0_7 output
TOD1_0 to TOD1_7 output + TOM0_0 to
TOM0_7 output
TML1 input (TIN30 to TIN33 input)
RTD interrupt generation command
DMA0-4 transfer completed
DMA5-9 transfer completed
CAN0 transmission completed, CAN0 reception completed,
CAN0 error passive, CAN0 error bus-off, CAN0 bus error
the ICU.
held low. For these level-recognized interrupts, the ICU's Interrupt Control
Register IRQ bit cannot be set or cleared in software.
5-4
INTERRUPT CONTROLLER (ICU)
Number of Input
Sources
1
1
1
1
1
1
4
4
1
1
1
8
16
4
1
5
5
5
ICU Type of Input
Source(Note)
Edge-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Level-recognized
Level-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Level-recognized
Level-recognized
Level-recognized
Edge-recognized
Level-recognized
Level-recognized
Level-recognized
Ver.0.10

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