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Hitachi H8S/2633 Hardware Manual page 68

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2.6.3
Table of Instructions Classified by Function
Table 2-3 summarizes the instructions in each functional category. The notation used in table 2-3
is defined below.
Operation Notation
Rd
Rs
Rn
ERn
MAC
(EAd)
(EAs)
EXR
CCR
N
Z
V
C
PC
SP
#IMM
disp
+
×
÷
¬
:8/:16/:24/:32
Note: * General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0 to
R7, E0 to E7), and 32-bit registers (ER0 to ER7).
General register (destination)*
General register (source)*
General register*
General register (32-bit register)
Multiply-accumulate register (32-bit register)
Destination operand
Source operand
Extended control register
Condition-code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Program counter
Stack pointer
Immediate data
Displacement
Addition
Subtraction
Multiplication
Division
Logical AND
Logical OR
Logical exclusive OR
Move
NOT (logical complement)
8-, 16-, 24-, or 32-bit length
41

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