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ø
t
OSC1
V
CC
FWE
MD2 to MD0
RES
SWE1 bit
Period during which flash memory access is prohibited
(x: Wait time after setting SWE1 bit)
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be
carried out by means of RES input. The state of ports with multiplexed address functions and bus control output
pins (AS, RD, WR) will change during this switchover interval (the interval during which the RES pin input is
low), and therefore these pins should not be used as output signals during this time.
2. When making a transition from boot mode to another mode, a mode programming setup time t
ns is necessary with respect to RES clearance timing.
3. See 25.6 Flash Memory Characteristics.
(Example: Boot Mode → User Mode ↔ User Program Mode)
838
Min 0 µs
t
MDS
t
MDS
t
RESW
SWE1
SWE1
set
cleared
Mode
Boot
Mode
*1
change
mode
change
*3
Figure 22-28 Mode Transition Timing
*2
t
MDS
User
User program mode
*1
mode
User
User program
mode
mode
(min) of 200
MDS
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