Advertisement
Bit 3 Bit 2 Bit 1 Bit 0
Channel
IOA3 IOA2 IOA1 IOA0 Description
3
0
0
1
1
0
1
0
0
TGR3A is Output disabled
output
1
compare
0
1
register
1
0
0
1
1
0
1
0
0
TGR3A is
input
1
capture
*
1
register
*
*
Initial output is 0
0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Output disabled
Initial output is 1
0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Capture input
Input capture at rising edge
source is
Input capture at falling edge
TIOCA3 pin
Input capture at both edges
Capture input
Input capture at TCNT4
source is channel
count-up/count-down
4/count clock
(Initial value)
*: Don't care
429
Advertisement
