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Section 18 I
2
A two-channel I
C bus interface is available as an option in the H8S/2633 Series. The I
interface is not available for the H8S/2633 Series. Observe the following notes when using this
option.
1. For mask-ROM versions, a W is added to the part number in products in which this optional
function is used.
Examples: HD6432633WF
2. The product number is identical for F-ZTAT versions. However, be sure to inform your
Hitachi sales representative if you will be using this option.
18.1
Overview
2
A two-channel I
C bus interface is available for the H8S/2633 Series as an option. The I
interface conforms to and provides a subset of the Philips I
functions. The register configuration that controls the I
configuration, however.
2
Each I
C bus interface channel uses only one data line (SDA) and one clock line (SCL) to transfer
data, saving board and connector space.
18.1.1
Features
• Selection of addressing format or non-addressing format
I
2
C bus format: addressing format with acknowledge bit, for master/slave operation
Serial format: non-addressing format without acknowledge bit, for master operation only
• Conforms to Philips I
• Two ways of setting slave address (I
• Start and stop conditions generated automatically in master mode (I
• Selection of acknowledge output levels when receiving (I
• Automatic loading of acknowledge bit when transmitting (I
• Wait function in master mode (I
A wait can be inserted by driving the SCL pin low after data transfer, excluding
acknowledgement. The wait can be cleared by clearing the interrupt flag.
2
C Bus Interface [Option]
2
2
C bus interface (I
C bus format)
2
C bus format)
2
C bus format)
2
C bus (inter-IC bus) interface
2
C bus differs partly from the Philips
2
C bus format)
2
C bus format)
2
C bus format)
2
C bus
2
C bus
691
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