Hitachi H8S/2633 Hardware Manual page 209

(2) RAS Down Mode and RAS Up Mode

Even when burst operation is selected, DRAM access may not be continuous, but may be

interrupted by accessing another area. In this case, burst operation can be continued by keeping the

RAS signal level Low while the other area is accessed and then accessing the same row address in

the DRAM space.

• RAS down mode

To select RAS down mode, set the RCDM bit of the MCR to 1. When DRAM access is

interrupted and another area accessed, the RAS signal level is kept Low and, if the row address

is the same as previously when the DRAM space is again accessed, burst access is continued.

Figure 7-23 shows example RAS down mode timing.

Note that if the refresh operation occurs when RAS is down, the RAS signal level changes to

Notes: n=2 to 5

OE* is enabled when OES=1.

Figure 7-23 Example Operation Timing in RAS Down Mode

External space

write access