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Hitachi H8S/2633 Hardware Manual page 711

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ø
PS
SCL
Noise
canceler
SDA
Noise
canceler
Legend:
2
ICCR:
I
C bus control register
2
ICMR:
I
C bus mode register
2
ICSR:
I
C bus status register
2
ICDR:
I
C bus data register
SAR:
Slave address register
SARX:
Second slave address register X
PS:
Prescaler
Clock
control
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
Figure 18-1 Block Diagram of I
ICCR
ICMR
ICSR
ICDRT
ICDRS
ICDRR
Address
comparator
SAR, SARX
Interrupt
generator
2
C Bus Interface
Interrupt
request
693

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