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1.2
Internal Block Diagram
Figure 1-1 shows an internal block diagram.
MD2
MD1
MD0
OSC2
OSC1
EXTAL
XTAL
PLLVCC
PLLCAP
PLLVSS
STBY
RES
WDTOVF
NMI
2
FWE*
PF7/ø
PF6/AS/ LCAS
PF5/RD
PF4/HWR
PF3/LWR/ADTRG/IRQ3
PF2/LCAS /WAIT/BREQO
PF1/BACK/BUZZ
PF0/BREQ/IRQ2
PG4/CS0
PG3/CS1
PG2/CS2
PG1/CS3/OE/IRQ7
PG0/CAS/IRQ6
P77/TxD3
P76/RxD3
P75/TMO3/SCK3
P74/TMO2/MRES
P73/TMO1/TEND1/CS7
P72/ TMO0/TEND0/CS6/SYNCI
P71/ TMR23/TMC23/DREQ1/CS5
P70/TMR01/TMC01/DREQ0/CS4
Notes: 1. Applies to the H8S/2633 only.
2. The FWE pin is used only in the flash memory version.
6
H8S/2600 CPU
Interrupt controller
PC break controller
(2 channels)
ROM
(Mask ROM,
*1
flash memory
)
RAM
TPU
PPG
Port 1
Figure 1-1 Internal Block Diagram
Port D
Port E
DTC
DMAC
WDT × 2 channels
8bit timer × 4 channels
SCI × 5 channels
(IrDA × 1channel)
2
I
C bus interface
(option)
14-bit PWM timer
D/A converter
A/D converter
Port 4
PA3/A19/SCK2
PA2/A18/RxD2
PA1/A17/TxD2
PA0/A16
PB7/A15/TIOCB5
PB6/A14/TIOCA5
PB5/A13/TIOCB4
PB4/A12/TIOCA4
PB3 / A11/TIOCD3
PB2/ A10/TIOCC3
PB1/A9/TIOCB3
PB0/A8/TIOCA3
PC7/A7/PWM1
PC6/A6/PWM0
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
P37/TxD4
P36/RxD4
P35/SCK1/SCK4/SCL0/ IRQ5
P34/RxD1/SDA0
P33/TxD1/SCL1
P32/SCK0/SDA1/IRQ4
P31/RxD0/IrRxD
P30/TxD0/IrTxD
P97/AN15/DA3
P96/AN14/DA2
P95/AN13
P94/AN12
P93/AN11
P92/AN10
P91/AN9
P90/AN8
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