8.5.11
DMAC Bus Cycles (Single Address Mode)
Single Address Mode (Read): Figure 8-27 shows a transfer example in which TEND output is
enabled and byte-size single address mode transfer (read) is performed from external 8-bit, 2-state
access space to an external device.
ø
Address bus
RD
DACK
TEND
release
Figure 8-27 Example of Single Address Mode (Byte Read) Transfer
276
DMA read
DMA read
Bus
Bus
release
DMA read
Bus
Bus
release
release
DMA
DMA read
dead
Last transfer
Bus
cycle
release