Hitachi H8S/2633 Hardware Manual page 302

Figure 8-28 shows a transfer example in which TEND output is enabled and word-size single

address mode transfer (read) is performed from external 8-bit, 2-state access space to an external

Figure 8-28 Example of Single Address Mode (Word Read) Transfer

A one-byte or one-word transfer is performed for one transfer request, and after the transfer the

bus is released. While the bus is released, one or more bus cycles are inserted by the CPU or

In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead

cycle is inserted after the DMA write cycle.

Last transfer