Hitachi H8S/2633 Hardware Manual page 109

A reset has the highest exception handling priority. There are two kinds of reset: a power-on reset

executed via the RES pin, and a manual reset executed via the MRES pin.

When the RES or MRES pin* goes low, currently executing processing is halted and the chip

enters the reset state. A reset initializes the internal state of the CPU and the registers of on-chip

supporting modules. Immediately after a reset, interrupt control mode 0 is set.

Reset exception handling starts when the RES or MRES pin* changes from low to high.

The reset state can also be entered in the event of watchdog timer overflow. For details see

section 15, Watchdog Timer.

Note: * MRES pin in the case of a manual reset.

Types of Reset

There are two types of reset: power-on reset and manual reset.

Table 4-3 shows the types of reset. When turning power on, do so as a power-on reset.

Both power-on reset and manual reset initialize the internal state of the CPU. In a power-on reset,

all of the registers of the built-in vicinity modules are initialized, while in a manual reset, the

registers of the built-in vicinity models except for bus controllers and I/O ports are initialized. The

states of the bus controllers and I/O ports are maintained.

During a manual reset built-in vicinity modules are initialized, and ports used as input pins for

built-in vicinity modules switch to the input ports controlled by DDR and DR.

If using manual reset, set the MRESE bit to 1 beforehand, thereby enabling manual resets.

See 3.2.2 System Control Register (SYSCR) for settings of the MRESE bit.

There are also power-on resets and manual resets as the two types of reset carried out by the

watchdog timer.