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Appendix 3: Technical Data of the CPU 948 and CPU 928B
Operation / Processing
Cycle time extension from nesting an empty OB 13
(without STEP 5 operations) at a block boundary
Clock rate for time-driven program
(timed interrupts OB 10 to OB 18)
Resolution for clock-driven timed interrupts
(OB 9)
Resolution for delayed interrupt (OB 6)
Default
selectable between
triggerable
Size of the user memory module
(in Kbytes)
Size of memory for data blocks (DB-RAM, in
Kbytes)
Number of timers and counters
Number of flags
12 - 8
Time-driven program execution
basic clock rate
from 1 to 255 ms.
Spec. in steps of
10, 20, 50, 100
200, 500 ms,
10, 20, 40, 80, 160,
320, 640 ms,
1.28, 2.56 s
every minute,
Cycle time monitoring
1 to 2550 ms
Memory sizes
Timers, counters and flags
256 of each
2048 flags
+ 32768 S flags
CPU 948
310 µ s for the 1st timed
287 µ s
170 µ s for each further
timed int. OB due at the
Variable
10, 20, 50, 100,
200, 500 ms,
10 ms:
1, 2, 5 s
or
every minute,
hourly,
daily,
weekly,
monthly,
yearly,
once
1 ms
200 ms
1 to 13000 ms
yes
640 or
1664
–
approx. 46.6
+ 8192 S flags
CPU 948 Programming Guide
C79000-G8576-C848-04
CPU 928B
int. OB
same time
1, 2, 5 sec
hourly,
daily,
weekly,
monthly,
yearly,
once
1 ms
150 ms
yes
64
256 of each
2048 flags
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