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Table 2-1
Overview of the organization blocks of the CPU 948 for program execution
Organization blocks for controlling program execution
Block
Function and call criterion
OB 1
Organization of cyclic program execution; first call after a start-up, then cyclic call.
With DX-0 setting "Process interrupt servicing via input byte
IB 0 =on":
(interruptability at block boundaries, can be set in DX 0)
Call with signal state change in input byte IB 0 in bit:
OB 2
I 0.0
OB 3
I 0.1
OB 4
I 0.2
OB 5
I 0.3
OB 6
I 0.4
OB 7
I 0.5
OB 8
I 0.6
I 0.7
OB 9
With DX-0 setting "Process interrupt servicing via input byte
IB 0 = off":
(interruptability at operation or block boundaries, can be set in DX 0)
Call via interrupt lines of the S5 bus:
System interrupt INT X (INT A, B, C or D, depends on slot)
OB 2
System interrupt INT E
OB 3
System interrupt INT F
OB 4
System interrupt INT G
OB 5
Delayed interrupt
OB 6
Clock-controlled interrupt
OB 9
Organization of time-controlled program execution (timed interrupt) with
selectable basic clock rate (default T = 100 ms) and
clock distributor (default corresponds to 150U) in data block DX 0;
Calls as follows:
Default setting
OB 10
OB 11
OB 12
OB 13
OB 14
OB 15
OB 16
OB 17
OB 18
CPU 948 Programming Guide
C79000-G8576-C848-04
150U clock distributor
0.1 s
T
0.2 s
T
0.5 s
T
1.0 s
T
2.0 s
T
5.0 s
T
10.0 s
T
20.0 s
T
50.0 s
T
Program, Organization and Sequence Blocks
n
2
*
1
*
2
*
5
*
10
*
20
*
50
*
100
*
200
*
500
clock distributor
T
*
1
T
*
2
T
*
4
T
*
8
T
*
16
T
*
32
T
*
64
T
*
128
T
*
256
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