Table of Contents
Advertisement
Control Bits and Interrupt Stack
5.4.2
ISTACK Content
ISTACK
Depth 01
OP-REG:
1205
BLK-STP:
EDEFF
PAGE
NUMBER:
00FD
BRACKETS:
KE1 000
ACCU1:
0000 31BA
CONDITION CODE:
CAUSE OF INTERR.:
Fig. 5-2
Example of a screen page "OUTPUT ISTACK"
5 - 14
If the CPU is in the stop state, you can display the content of the
ISTACK on the screen after the control bit display by pressing the
enter key. When the CPU goes into the STOP mode, the system
program enters all the information it needs in this ISTACK for a warm
restart.
You can use the entries in this ISTACK to see what kind of error
occurred and where it occurred in the program.
If the stop state was caused by a single error, only one level of the
ISTACK information is displayed. With several errors, the
corresponding number of ISTACK levels are output (DEPTH 01,
DEPTH 02, etc.). At all levels, only one error is marked as the
CAUSE OF INTERRUPT.
If several errors have occurred DEPTH 01 marks the error detected
immediately before the change to the stop state.
Fig 5-2 is an example of a PG display of the ISTACK content.
SAC (new):
000B3
DB-ADD:
PB-NO.:
9
DB-NO.:
REL-SAC:
00013
DBL-REG:
000B2
SAC (old):
ICMK:
KE2 000
KE3 000
KE4 000
ACCU2:
0000 0005
CC1
CC0
OVFL
STATUS
RLO
X
X
KB
TRAF
KDB
NAU
QVZ
ADF
STS
WEFEH
PEU
BA-ADD:
00000
OB-NO.:
0000
BR-REG:
ICRW:
09DF3FBF
KE5 000
KE6 000
ACCU3:
0004 0005
ACCU4:
OVFLS
ODER
SUF
STUEB
PARE
ZYK
X
HALT
CPU 948 Programming Guide
00108
1
00000
FFFFFFFF
0004 0005
ERAB
STUEU
STOP
C79000-G8576-C848-04
Advertisement
Table of Contents
