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Multiprocessor Mode
Transmitting IPC flags in
multiprocessor operation
Multiprocessor
communication
10.1.4
Exchanging Data via
Handling Blocks
10 - 8
At the end of each program cycle, along with the updating of the
process image, the CPU transmits the IPC flags specified in DB 1
when the coordinator signals the CPU that it can access the S5 bus.
The coordinator allocates the bus enable signal to each CPU in
sequence. When a CPU has access to the S5 bus, it can transmit only
one byte. Because of this interleaved transmission, related (byte
groups) IPC flag information can be separated and subsequently
processed with old or incorrect values.
If you want to transfer information that takes up more than one byte,
you can prevent corruption of data by setting a parameter in extended
data block DX 0. This parameter uses semaphores to ensure that all
IPC flags specified in DB 1 are transferred in groups (see Chapter 7).
While one CPU is transmitting IPC flags, another CPU cannot
interrupt it. Because the next CPU has to wait to transmit its data,
cyclic program processing of this CPU is delayed accordingly.
Under certain circumstances, the setting you make in DX 0 can
increase the cycle time considerably.
For transferring data blocks or more exactly fields of data with a size
of max. 64 byte (= 32 data words), the following special functions are
integrated in the CPU:
• • OB 200: INITIALIZE:
• • OB 202: SEND:
• • OB 203: SEND TEST:
• • OB 204: RECEIVE:
• • OB 205: RECEIVE TEST:
Handling blocks are capable of multiprocessing. A special parameter
assignment for the multiprocessor mode is not necessary. For more
information on handling blocks refer to the appropriate manual.
preassign
send a data field
test sending capacity
receive a data field
test receiving capacity
CPU 948 Programming Guide
C79000-G8576-C848-04
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