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Memory Access via Address in ACCU 1
19
0
addressed
memory
location
ACCU 1
19
0
addressed
memory
location
ACCU 1
Fig. 9-3
LIR/TIR with 16-bit memory areas (word-oriented)
19
0
addressed
memory
location
ACCU 1
19
0
addressed
memory
location
ACCU 1
Fig. 9-4
LIR/TIR with 8-bit memory areas (byte-oriented)
9 - 10
15
0
7
0
15
LIR n
15
TIR n
15
x
x
LIR n
15
x
x
TIR n
CPU 948 Programming Guide
C79000-G8576-C848-04
0
Register n
0
Register n
0
Register n
0
Register n
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