Bus Arbitration Timing (Continued) - Motorola M68060 User Manual

CLK
BCLK
CLKEN
ADDRESS &
ATTRIBUTES
TS
SAS
LOCK , LOCKE
D31ÐD0 (OUT)
(WRITE)
BR
BG
BGR
BTT (OUT)
NOTES:
1. For illustrative purposes, a bus mastership hand-over is shown after a locked bus cycle sequence
2. Address and attributes refer to the following signals:
Figure 12-5. Bus Arbitration Timing (Continued)
MOTOROLA
58
58
12
12
40
41b
42b
41f
61
which adds one extra clock period between the bus mastership hand-over that would not
occur for a bus mastership hand-over after a non-locked bus cycle.
A31ÐA0, SIZ1, SIZ0, R/W, TT1, TT0, TM2ÐTM0, TLN1, TLN0, UPA1, UPA0, CIOUT, BS3-BS0
M68060 USERÕS MANUAL
Electrical and Thermal Characteristics
38
12
60
38
59
38
21
19
42b
42f
(SEE NOTE 1)
11a
13
60
57
11a
12
41b
62
62 63
12-9