Halt Mode Release By Reset Input - NEC mPD780208 Subseries User Manual

(d) Release by RESET input
When a RESET signal is input, the HALT mode is released. As is the case with a normal reset
operation, the program is executed after branch to the reset vector address.
RESET
signal
Operating
mode
Clock
Remarks 1. f : Main system clock oscillation frequency
X
2. Figures in parentheses apply to operation with f
Release Source
Maskable interrupt request
Non-maskable interrupt request
Test input
RESET input
×: don't care
CHAPTER 17 STANDBY FUNCTION
Figure 17-3. HALT Mode Release by RESET Input
HALT
instruction
HALT mode
Oscillation
Table 17-2. Operation After HALT Mode Release
MK×× PR×× IE
0 0 0
0 0 1
0 1 0
×
0 1
0 1 1
× ×
1
×
– –
×
0 –
×
1 –
×
– –
User's Manual U11302EJ4V0UM
Wait
(2 17 /f : 26.2 ms)
X
Oscillation
Reset stabilization
wait status
period
Oscillation
stop Oscillation
= 5.0 MHz.
X
ISP
×
Next address instruction execution
×
Interrupt servicing
1 Next address instruction execution
0
1 Interrupt servicing
×
HALT mode hold
×
Interrupt servicing
×
Next address instruction execution
×
HALT mode hold
×
Reset processing
Operating
mode
Operation
363