Capture Register Data Retention Timing - NEC mPD780208 Subseries User Manual

(4) Capture register data retention timing

If the valid edge of the TI0/P00 pin is input during 16-bit capture register (CR01) read, CR01 holds the data without
carrying out the capture operation. However, the interrupt request signal (INTTM0) is generated upon detection
of the valid edge.
Count pulse
TM0
N
count value
Edge input
INTTM0
Capture
read signal
CR01
captured value
(5) Valid edge setting
When using the INTP0/TI0/P00 pin as a timer input pin (TI0), stop the operation of the 16-bit timer by clearing
bits 1 to 3 (TMC01 to TMC03) of the 16-bit timer mode control register (TMC0) to 0, 0, 0, before setting the valid
edge of TI0. When using the INTP0/TI0/P00 pin as an external interrupt input pin (INTP0), the valid edge of INTP0
may be set while the 16-bit timer is operating.
144
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
Figure 6-22. Capture Register Data Retention Timing
N + 1 N + 2
X
User's Manual U11302EJ4V0UM
M M + 1
N + 1
Capture operation
ignored
M + 2