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Figure 15-1. VFD Controller Operation Timing in Display Mode 1 (DSPM05 = 0)
T
DSP
Digit signal
FIP0
FIP1
FIP2
.
.
.
.
.
.
.
.
.
.
.
.
FIPn
Key scan flag
(KSF)
Segment
Note
signal
1 display cycle
DSPM05: Bit 5 of display mode register 0 (DSPM0)
n:
Displayed digits – 1 (Digits 2 to 16 can be selected using display mode register 1 (DSPM1))
T
:
1 display cycle (1024/f
DSP
T
:
Key scan timing (T
KS
T
:
Display cycle (T
CYT
T
:
Pulse width of digit signal (Can be selected from 8 types using DSPM1)
DIG
Note The user can select the cut width of the segment signals by setting bits 1 to 3 (DIMS1 to DIMS3) of DSPM1.
Therefore, actual output waveforms may be different from the above illustration and have the cut widths
shown in Figure 15-6.
Remark If DSPM05 is set to 1, digit signals are output according to the values set in the display RAM.
300
CHAPTER 15 VFD CONTROLLER/DRIVER
T
CYT
(204.8 µ s: @ 5.0 MHz operation) or 2048/f
x
= T
)
KS
DSP
= T
x (Displayed digits + 1))
CYT
DSP
User's Manual U11302EJ4V0UM
T
KS
T
DIG
Can be changed
whenever necessary
Key scan timing
(409.6 µ s: @ 5.0 MHz operation))
x
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