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(2) Watch timer mode control register (TMC2)
This register sets the watch timer operating mode, watch flag set time and prescaler interval time and
enables/disables prescaler and 5-bit counter operations.
TMC2 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TMC2 to 00H.
Figure 8-3. Format of Watch Timer Mode Control Register
Symbol
7
6
TMC2
0
TMC26 TMC25 TMC24 TMC23 TMC22 TMC21 TMC20
Note Do not frequently clear the prescaler when using the watch timer.
Remarks 1. f
: Watch timer clock frequency (f
W
2. Figures in parentheses apply to operation with f
172
CHAPTER 8 WATCH TIMER
5
4
3
2
1
User's Manual U11302EJ4V0UM
0
Address
After reset
FF4AH
00H
TMC23
TMC20
Watch flag set time selection
14
0
2
/f
(0.5 s)
W
0
13
2
/f
(0.25 s)
1
W
5
0
2
/f
(977
W
1
1
4
2
/f
(488
W
TMC21
Prescaler operation control
0
Clear after operation stops
1
Operation enable
TMC22
5-bit counter operation control
0
Clear after operation stops
1
Operation enable
TMC26
TMC25
TMC24
Prescaler interval time selection
2
0
0
0
2
0
0
1
0
1
0
2
2
0
1
1
2
1
0
0
2
1
0
1
Other than above
Setting prohibited
8
/2
or f
)
X
XT
= 32.768 kHz.
W
R/W
R/W
µ
s)
µ
s)
Note
µ
4
/f
(488 s)
W
µ
5
/f
(977 s)
W
6
/f
(1.95 ms)
W
7
/f
(3.91 ms)
W
8
/f
(7.81 ms)
W
9
/f
(15.6 ms)
W
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