Chapter 1 Outline; Features - NEC mPD780208 Subseries User Manual

1.1 Features

Internal high-capacity ROM and RAM
Item
ROM
Part
Number
µ PD780204
32 KB
µ PD780204A
µ PD780205
40 KB
µ PD780205A
µ PD780206
48 KB
µ PD780208
60 KB
µ PD78P0208
—
Notes 1. 32, 40, 48, or 60 KB can be selected by setting the internal memory size switching register (IMS).
2. 0 or 1024 bytes can be selected by setting the internal expansion RAM size switching register (IXS).
Minimum instruction execution time can be changed from high speed (0.4 µ s: @ 5.0 MHz operation with main
system clock) to ultra-low speed (122 µ s: @ 32.768 kHz operation with subsystem clock)
74 I/O ports
VFD controller/driver: 53 display outputs in total
• Segments: 9 to 40
• Digits: 2 to 16
8-bit resolution A/D converter: 8 channels
• Power supply voltage (AV
Serial interface: 2 channels
• 3-wire serial I/O/SBI/2-wire serial I/O mode: 1 channel
• 3-wire serial I/O mode (automatic transmit/receive function): 1 channel
Timer: 5 channels
• 16-bit timer/event counter: 1 channel
• 8-bit timer/event counter: 2 channels
• Watch timer: 1 channel
• Watchdog timer: 1 channel
15 vectored interrupt sources
One test input
Two types of on-chip clock oscillators (for main and subsystem clocks)
Power supply voltage: V
24

CHAPTER 1 OUTLINE

Program Memory
PROM
—
—
—
—
Note 1
60 KB
= 4.0 to 5.5 V)
DD
= 2.7 to 5.5 V
DD
User's Manual U11302EJ4V0UM
Data Memory
Internal High- Buffer RAM
Speed RAM
1024 bytes 64 bytes
VFD Display Internal
RAM Expansion RAM
80 bytes None
1024 bytes
Note 2
1024 bytes