Counter (C); Data Register (D) - Mitsubishi Electric MELSEC Q Series Programming Manual

5 SEQUENCE INSTRUCTIONS FOR MOTION CPU

5.1.5 Counter (C)

5.1.6 Data register (D)

The counter counts up and detects the rising edge of the input conditions. Thus, the
count will not take place when the input conditions are ON.
(1) The value is set with a decimal, and can be designated from 1 to 32767. The data
register (D) data can also be used as the setting value.
(2) The counter count value will not be cleared even if the input conditions turn OFF.
The counter count value must be cleared with the RST instruction.
(3) With the device C, the contact • coil is handled as bit device, and the current value
(counter value) is handled as word device. In the function instructions described
after, the word device C indicates the current value (counter value) even if there is
no description about it.
(4) Turning the power OFF clears this device (current value = 0).
(5) The counter number is expressed as a decimal.
The data register is the memory that stores the data in the Motion CPU. The data
register has a 1-point 16-bit configuration, and can be read and written in 16-bit units.
(1) To handle 32-bit data, two points must be used. The data register number
designated with the 32-bit instruction will be the low-order 16-bit, and the
designated data register number +1 will be the high-order 16-bit.
(a) The following is an example of the circuits using the DMOV instruction.
0
(b) Data storage.
D2001
Hight-order 16-bit
(X1F to X10)
(2) Turning the power OFF clears this device. (Latch setting can be applied with the
system setting.)
(3) The data register number is expressed as a decimal.
(4) Part of D is used in the system of the Motion CPU for the positioning dedicated
signal etc. The use of that is restricted.
Refer to the "Q173D(S)CPU/Q172D(S)CPU Motion controller (SV13/SV22)
Programming Manual (REAL MODE)" or "Q173D(S)CPU/Q172D(S)CPU Motion
controller (SV22) Programming Manual (VIRTUAL MODE)" for details.
DMOV K8X0 D2000
D2000
Low-order 16-bit
(XF to X0)
5 - 5
The X0 to 1F data is
stored in D2000,2001.