Chapter 2 Analog Input Module Replacement; List Of Analog Input Module Alternative Models For Replacement - Mitsubishi Electric MELSEC-A/QnA Series Handbook

2
ANALOG INPUT MODULE REPLACEMENT
2

2.1 List of Analog Input Module Alternative Models for Replacement

Production discontinuation
Product Model
A616AD
A68AD
Analog input module
A68AD-S2
2
- 1
ANALOG INPUT MODULE
2
REPLACEMENT
Model
1) External wiring
2) Number of slots
3) Program
Q68ADV
Q68ADI
4) Performance specifications change:
5) Function specifications: Not changed
1) External wiring
2) Number of slots
3) Program
Q68ADV
Q68ADI
4) Performance specifications change:
5) Function specifications: Not changed
1) External wiring
2) Number of slots
3) Program
*1
4) Performance specifications change:
Q68AD-G
5) Function specifications: Changed (Non-insulation  insulation between
1) External wiring
2) Number of slots
3) Program
Q68ADV
Q68ADI
4) Performance specifications change:
5) Function specifications: Not changed
1) External wiring
2) Number of slots
3) Program
*1
4) Performance specifications change:
Q68AD-G
5) Function specifications: Changed (Non-insulation  insulation between
Transition to Q series
Remarks (Restrictions)
: Cable size is changed.
: Changed (2 modules are required.)
: Occupied I/O points, I/O signals and buffer memory address
are changed.
8CH/module, input signals (Either V or I input)
: Cable size is changed.
: Not changed
: Occupied I/O points, I/O signals and buffer memory address
are changed.
Input signals (Either V or I input) and I/O characteristics
: Cable size is changed. (Terminal block wiring  connector
wiring)
: Not changed
: Occupied I/O points, I/O signals and buffer memory address
are changed.
Conversion speed ((the maximum of 2.5ms/channel) 
sampling cycle (10ms/channel) + response speed (20ms))
and I/O characteristics
channels)
: Cable size is changed.
: Not changed
: Occupied I/O points, I/O signals and buffer memory address
are changed.
Input signals (Either V or I input) and I/O characteristics
: Cable size is changed. (Terminal block wiring  connector
wiring)
: Not changed
: Occupied I/O points, I/O signals and buffer memory address
are changed.
Conversion speed ((the maximum of 2.5ms/channel) 
sampling cycle (10ms/channel) + response speed (20ms))
and I/O characteristics
channels)