Mitsubishi Electric MELSEC iQ-R AnyWireASLINK User Manual page 123

Output response delay time
The figure below shows the time from turning on or off of a device of the CPU module to turning on or off of an output of a
slave module.
The output response delay time is the total of  to  in the following figure.
(1)
(2)
(3)
(1) Slave module
(2) AnyWireASLINK
(3) CPU module
No. Description

Processing time on the programmable
controller

Processing time on the RJ51AW12AL

Transmission time

Processing time on the slave module

Output response time on the slave module
Ó
Ò
Required time
Sequence scan time
0.6ms
• Bit data: Bit transmission cycle time  2
• Word data: Word transmission cycle time
The transmission cycle time varies depending on the specified number of bit data points and the
specified number of word data points. ( Page 111 Transmission cycle time)
Approx. 0.04ms (Differs depending on the slave module.)
Refer to the manual for the slave module connected to the system or the device connected to the
slave module.
Ö
Õ
Ô
Appendix 4 Processing Time
A
APPX
121