Figure 23.39 Dram Burst Bus Cycle (Edo Mode, Rcd [1:0] = 01, Anw [2:0] = 001, Tpc [2:0] = 001, 2-Cycle Cas Negate Pulse Width) - Hitachi SH7751 Hardware Manual

Figure 23.39 DRAM Burst Bus Cycle (EDO Mode, RCD [1:0] = 01, AnW [2:0] = 001,
TPC [2:0] = 001, 2-Cycle CAS Negate Pulse Width)
Rev. 3.0, 04/02, page 995 of 1064