Notes: IO:
DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 23.31 Synchronous DRAM Bus Cycle: Precharge Command (TPC [2:0] = 001)
Rev. 3.0, 04/02, page 986 of 1064
Tpr
CKIO
t
AD
Bank
Row
Precharge-sel
H/L
Address
t
CSD
t
t
RWD
RD/
t
RASD
t
CASD2
t
DQMD
DQMn
t
WDD
D31–D0
(write)
CKE
t
DACD
DACKn
Tpc
t
AD
t
CSD
RWD
t
RASD
t
CASD2
t
DQMD
t
WDD
t
BSD
t
DACD