Hitachi F-ZTAT H8/3039 Series Hardware Manual page 552

Table 18-13 Timing of On-Chip Supporting Modules
Condition A: V = 3.0 V to 5.5 V, AV
CC
T = –20°C to +75°C (regular specifications), T
a
specifications)
= 5.0 V ± 10%, AV
Condition B: V
CC
T = –20°C to +75°C (regular specifications), T
a
specifications)
Item
ITU Timer output delay time
Timer input setup time
Timer clock input setup
time
Timer clock Single edge t
pulse width
SCI Input clock
cycle
Input clock rise time
Input clock fall time
Input clock pulse width
= 3.0 V to 5.5 V, V
CC
= 5.0 V ± 10%, V
CC
Symbol Min
t
TOCD
t
TICS
t
TCKS
TCKWH
Both edges t
TCKWL
Asynchro- t
Scyc
nous
Synchro-
nous
t
SCKr
t
SCKf
t
SCKW
= AV
SS SS
= –40°C to +85°C (wide-range
a
= AV = 0 V, ø = 2 MHz to 18 MHz,
SS SS
= –40°C to +85°C (wide-range
a
Condition A Condition B
10 MHz 18 MHz
Max Min
— 100 —
50 — 50
50 — 50
1.5 — 1.5
2.5 — 2.5
4 — 4
6 — 6
— 1.5 —
— 1.5 —
0.4 0.6 0.4
= 0 V, ø = 2 to 10 MHz,
Test
Max Unit Conditions
100 ns Figure 18-
15
—
— Figure 18-
16
— t
cyc
—
— Figure 18-
17
—
1.5
1.5
0.6 t
Scyc
545