Table 18-11 Bus Timing (cont)
Condition A: V
= 3.0 V to 5.5 V, AV
CC
T
= –20°C to +75°C (regular specifications), T
a
specifications)
= 5.0 V ± 10%, AV
Condition B: V
CC
T
= –20°C to +75°C (regularspecifications), T
a
specifications)
Item
Write data delay time
Write data setup time 1
Write data setup time 2
Write data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Precharge time
Wait setup time
Wait hold time
Note: * For condition A, the following times depend on the clock cycle time as shown below.
= 1.5 × t
t
ACC1
cyc
= 2.5 × t
t
ACC2
cyc
= 1.0 × t
t
ACC3
cyc
= 2.0 × t
t
ACC4
cyc
For condition B, the following times depend on the clock cycle time as shown below.
= 1.5 × t
t
ACC1
cyc
= 2.5 × t
t
ACC2
cyc
= 1.0 × t
t
ACC3
cyc
= 2.0 × t
t
ACC4
cyc
CC
= 5.0 V ± 10%, V
CC
= 1.0 × t
– 50 (ns)
t
WSW1
= 1.5 × t
– 50 (ns)
t
WSW2
= 1.0 × t
– 50 (ns)
t
PCH
– 50 (ns)
= 1.0 × t
– 34 (ns)
t
WSW1
= 1.5 × t
– 34 (ns)
t
WSW2
= 1.0 × t
– 36 (ns)
t
PCH
– 31 (ns)
= 3.0 V to 5.5 V, V
SS
a
= AV
SS
a
Condition A Condition B
10 MHz
Symbol
Min
Max Min
t
—
75
WDD
t
40
—
WDS1
t
–10
—
WDS2
t
20
—
WDH
t
—
100
*
ACC1
t
—
200
*
ACC2
t
—
50
*
ACC3
t
*
—
150
ACC4
t
*
60
—
PCH
t
40
—
WTS
t
10
—
WTH
– 40
cyc
– 40
cyc
– 40 (ns)
cyc
– 24
cyc
– 22
cyc
– 21 (ns)
cyc
= AV
= 0 V, ø = 2 to 10 MHz,
SS
= –40°C to +85°C (wide-range
= 0 V, ø = 2 MHz to 18 MHz,
SS
= –40°C to +85°C (wide-range
18 MHz
Max Unit Conditions
—
55
ns
10
—
–10
—
20
—
—
50
—
105
—
20
—
80
40
—
25
—
ns
5
—
(ns)
(ns)
(ns)
(ns)
Test
Figure 18-7,
Figure 18-8
Figure 18-9
543