Hitachi F-ZTAT H8/3039 Series Hardware Manual page 320

Single-chip microcomputer
Table of Contents

Advertisement

Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A. NDR contents should not be altered during the interval from compare match B
to compare match A (the non-overlap margin).
This can be accomplished by having the IMFA interrupt service routine write the next data in
NDR, or by having the IMFA interrupt activate the DMAC. The next data must be written before
the next compare match B occurs.
Figure 9-10 shows the timing relationships.
Compare
match A
Compare
match B
NDR
DR
Figure 9-10 Non-Overlapping Operation and NDR Write Timing
310
NDR write
0 output
0/1 output
Write to NDR
in this interval
Do not write
to NDR in this
interval
NDR write
0 output
0/1 output
Write to NDR
in this interval
Do not write
to NDR in this
interval

Advertisement

Table of Contents
loading

This manual is also suitable for:

F-ztat h8/3039F-ztat h8/3038F-ztat h8/3037F-ztat h8/3036

Table of Contents