Motorola DSP56367 User Manual page 85

Table 3-8 SRAM Read and Write Accesses (Continued)
No. Characteristics
113 RD deassertion time
114 WR deassertion time
115 Address valid to RD assertion
116 RD assertion pulse width
117 RD deassertion to address not valid
118
TA setup before RD or WR deassertion
119 TA hold after RD or WR deassertion
Note: 1. WS is the number of wait states specified in the BCR.
2. Timings 100, 107 are guaranteed by design, not tested.
3. All timings for 100 MHz are measured from 0.5
4. In the case of TA negation: timing 118 is relative to the deassertion edge of RD or WR were
TA to remain active
MOTOROLA
External Memory Expansion Port (Port A)
Symbol
(WS + 0.25) × T
4
·
Vcc to .05
DSP56367
Specifications
1
Min
Expression
0.75 × T − 4.0
2.2
C
[1 ≤ WS ≤ 3]
1.75 × T − 4.0
10.6
C
[4 ≤ WS ≤ 7]
2.75 × T − 4.0
18.9
C
[WS ≥ 8]
0.5 × T − 4.0
0.2
C
[WS = 1]
− 2.0
T 6.3
C
[2 ≤ WS ≤ 3]
2.5 × T − 4.0
16.8
C
[4 ≤ WS ≤ 7]
3.5 × T − 4.0
25.2
C
[WS ≥ 8]
0.5 × T − 4.0
0.2
C
−4.0
6.4
C
0.25 × T − 2.0
0.1
C
[1 ≤ WS ≤ 3]
1.25 × T − 2.0
8.4
C
[4 ≤ WS ≤ 7]
2.25 × T − 2.0
16.7
C
[WS ≥ 8]
0.25 × T
+ 2.0 4.1
C
0.0
·
Vcc
Uni
Max
t
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
3-19