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Digital Audio Transmitter
DAX Programming Considerations
Figure 12-5 shows how each clock is divided to generate the biphase and bit shift clocks
DSP Core Clock
×
(1024
Fs)
ACI Pin
×
{256,384,512}
Fs
Note:
For proper operation of the DAX, the DSP core clock frequency must be at least
five times higher than the DAX bit shift clock frequency (64 × Fs).
12.5.12 DAX STATE MACHINE
The DAX state machine generates a set of sequencing signals used in the DAX.
12.6
DAX PROGRAMMING CONSIDERATIONS
The following sections describe programming considerations for the DAX.
12.6.1
INITIATING A TRANSMIT SESSION
To initiate the DAX operation, follow this procedure:
1. Ensure that the DAX is disabled (PC1 and PC0 bits of port control register PCR are
cleared)
2. Write the non-audio data to the corresponding bits in the XNADR register
3. Write the channel A and channel B audio data in the XADR register
4. Write the transmit mode to the XCTR register
12-12
1/4
0
1
1/2
1
0
(XCS1 or XCS0)
2/3
XCS1
XCS0
Figure 12-5 Clock Multiplexer Diagram
DSP56367
0
1/2
1
Biphase
Clock
×
(128
Fs)
Bit Shift
Clock
1/2
×
(64
Fs)
AA0610
MOTOROLA
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