Frame Sync For Transmitter (Fst) - Motorola DSP56367 User Manual

Enhanced Serial Audio Interface (ESAI)
ESAI Data and Control Pins
input flag IF1, the data value at the pin is stored in the IF1 bit in the SAISR register,
synchronized by the frame sync in normal mode or the slot in network mode.
FSR may be programmed as a general-purpose I/O pin (PC1) when the ESAI FSR function is
not being used.

10.2.10 FRAME SYNC FOR TRANSMITTER (FST)

FST is a bidirectional pin providing the frame sync for both the transmitters and receivers in
the synchronous mode (SYN=1) and for the transmitters only in asynchronous mode (SYN=0)
(see Table 10-2). The direction of this pin is determined by the TFSD bit in the TCR register.
When configured as an output, this pin is the internally generated frame sync signal. When
configured as an input, this pin receives an external frame sync signal for the transmitters (and
the receivers in synchronous mode).
FST may be programmed as a general-purpose I/O pin (PC4) when the ESAI FST function is
not being used.
10.2.11 HIGH FREQUENCY CLOCK FOR TRANSMITTER (HCKT)
HCKT is a bidirectional pin providing the transmitters high frequency clock for the ESAI
interface. The direction of this pin is determined by the THCKD bit in the TCCR register. In
the asynchronous mode (SYN=0), the HCKT pin operates as the high frequency clock input or
output used by all enabled transmitters. In the synchronous mode (SYN=1), it operates as the
high frequency clock input or output used by all enabled transmitters and receivers. When
programmed as input this pin is used as an alternative high frequency clock source to the
ESAI transmitter rather than the DSP main clock. When programmed as output it can serve as
a high frequency sample clock (to external DACs for example) or as an additional system
clock. See Table 10-2.
HCKT may be programmed as a general-purpose I/O pin (PC5) when the ESAI HCKT
function is not being used.
10.2.12 HIGH FREQUENCY CLOCK FOR RECEIVER (HCKR)
HCKR is a bidirectional pin providing the receivers high frequency clock for the ESAI
interface. The direction of this pin is determined by the RHCKD bit in the RCCR register. In
the asynchronous mode (SYN=0), the HCKR pin operates as the high frequency clock input
10-8 DSP56367 MOTOROLA