Power Consumption Considerations - Motorola DSP56367 User Manual

24-bit digital signal processor
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Design Considerations

Power Consumption Considerations

RESET must be asserted when the chip is powered up. A stable EXTAL signal must
be supplied before deassertion of RESET.
At power-up, ensure that the voltage difference between the 3.3 V tolerant pins and the
chip V
never exceeds a TBD voltage.
CC
4.3
POWER CONSUMPTION CONSIDERATIONS
Power dissipation is a key issue in portable DSP applications. Some of the factors which
affect current consumption are described in this section. Most of the current consumed by
CMOS devices is alternating current (ac), which is charging and discharging the capacitances
of the pins and internal nodes.
Current consumption is described by the following formula:
×
×
I
=
C
V f
where
For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, and with a 100 MHz clock, toggling at its maximum possible
rate (50 MHz), the current consumption is
The maximum internal current (I
internal buses on best-case operation conditions, which is not necessarily a real application
case. The typical internal current (I
buses on typical operating conditions.
For applications that require very low current consumption, do the following:
Set the EBD bit when not accessing external memory.
Minimize external memory accesses and use internal memory accesses.
Minimize the number of pins that are switching.
4-4
C = node/pin capacitance
V = voltage swing
f = frequency of node/pin toggle
Example 4-1 Current Consumption
12
×
×
×
×
I
=
50 10
3.3
50
10
max) value reflects the typical possible switching of the
CCI
) value reflects the average switching of the internal
CCItyp
DSP56367
6
=
8.25mA
MOTOROLA

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