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For discussion purposes a 5-bit configuration is used (sign and 4 magnitude bits).
The addition of two positive numbers is illustrated in Figure 2-16a.
The contents of a mem-
ory location is stored in the M-register and added to the contents of the A-register.
The
addition occurs in the sum network.
The sum of the two numbers is transferred to the A-
register via the D-register.
The next case, a positive and a negative number is equally simple (Figure 2-16b). For
this example the numbers +7 and -12 are to be added, the latter being in the A-register at
the start of the addition.
All that needs to be done is to add A to the effective operand in memory (+7).
The
operand is transferred to the M-register and presented in summand H.
The contents of A is
presented to summand G.
The sum is in two's complement (-5).
Adding two negative numbers is no more difficult since both numbers are in two's com-
plement. (Refer to Figure 2-l 6c.) The adding consists of presenting the contents of M to
summand H (two's complement of -5) and presenting the contents of A to summand G (-9).
The resultant sum is in two's complement (-14).
0 0
111
0 0101
0 I 100
{a.)
{+7)
{+5)
{+12)
00111
{+7)
10100(-12)
I
0
I I
(-5)
{ b.)
I 0 I I I
(-9)
I I 0 I I (-5)
10010(-14)
{ c )
Figure 2-16.
Addition Examples
RP
Subtraction. --Two's complement subtraction is quite simple (see Figure 2-17).
One of
the numbers (the contents of M) is two's complemented prior to being added to the con-
tents of A.
This occurs at the input of summand H with selection signals ENSHL and
ENSLL, and carry injection signal E lKl 7.
The sum is transferred to D to provide the
result directly to A.
00111
(+ 7)
00111
(+7)
I I 010
<+5)
00100 (=-5°)
I
I
---
00010 (+ 2)
0 1100 (+12)
(a.)
7-(+5)
(b.) 7-(- 5)
RP
Figure 2-17.
Subtraction Examples
2-20
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