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BASIC FLIP-FLOP PAC, MODEL FF-335
The Basic Flip-Flop PAC, Model FF-335 (Figures A-88 and A-89), contains
eight independent flip-flop circuits.
Each circuit is formed by two separate NAND
gates wired back to back internally.
The output of one gate is connected to the input of
the other.
Figure A-90 illustrates the logic operation.
Each stage of the FF-335 has a
de reset input, and a set and reset output.
INPUT AND OUTPUT SIGNALS
DC Set and DC Reset. -- A signal at logic ZERO (ground) for 60 nsec or longer on
either input will set or reset the flip-flop.
SPECIFICATIONS
Frequency of Operation (System)
DC to 5 me
Input Loading
DC inputs: 1 unit load each
DC Set and Reset Timing
60 nsec (min) at logic ZERO
to set or reset
Handle Color Code
Blue
APPLICATIONS
Output Drive Capability
7 unit loads each
Circuit Delay
60 nsec (max)
Current Requirements
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Power Dissipation
0. 60w (max)
The FF-335 PAC is used for economical implementation of logic operations,
such as input-output registers, storage and buffering applications.
Control of data into
and out of the register can be easily accomplished by using gating PACs in the µ-PAC
line.
Figure A-91 illustrates how an FF-335 stage can be used for data storage, with
inputs and outputs from several locations.
A-155
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