Honeywell DDP-416 Instruction Manual page 165

General purpose i/c digital computer
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UNIVERSAL FLIP-FLOP PAC, MODEL CC-085
The Universal Flip-Flop PAC, Model CC-085 (Figures A-35 and A-36), contains
three versatile, independent flip-flops which can perform the functions of storage, counting,
shifting, and control.
Each flip-flop circuit has a comprehensive input structure which
allows control of the flip-flop from a variety of level and pulse inputs.
Each stage has two
de set and two de reset inputs, set control and reset control inputs, a clock input, and set
and reset outputs.
There is also a common res et input for clearing all stages simultaneously.
INPUT AND OUTPUT SIGNALS
DC Set and DC Reset. -- A signal at ground from 80 nsec or longer on any de
set or reset input wiii set or reset the flip-flop, respectively.
Common Reset. -- A signal at ground for 80 nsec or longer on the common reset
input clears the three stages simultaneously.
Set Control and Reset Control. -- +6v is the enabling level on the control inputs.
Refer to Section II for complete information on flip-flop operation.
Clock. -- The flip-flop can change state on the negative transition on the clock
input.
SPECIFICATIONS
DC to 5 me
Input Loading
DC inputs:
2/ 3 unit load each
Control inputs:
unit load
Clock input:
unit load
Common input:
unit load
Common reset: 2 unit lads
Output Drive Capability
8 unit loads
APPLICATIONS
each
each
each
Clock input to set or reset output:
60 nsec (max)
DC set input to set output, or de reset
input to reset output:
80 nsec (max)
DC set input to res et output, or de
res et input to set output:
60 ns ec (max)
Current Requirements
+6v:
75 ma (max)
Power Dissipation
0. 45w (max)
Handle Color Code
Blue
The CC-085 PAC can be used as a counter (Figures A-37 and A-38) or as a shift
register (Figure A-39). The method of parallel information drop-in is illustrated in
Figure A-40.
Data may be transferred to the flip-flop with single-ended signals by first reset-
ting all stages, then setting only the appropriate ones.
With double-ended data transfer,
complementary signals are applied to the de set and de reset inputs for putting the flip-flop
in the appropriate state in one operation.
A-65

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